A data processing system which utilizes microinstructions conventionally requires appropriate control of the sequencing of the microinstructions which are generated as a result of the decoding of a macroinstruction.
A particular system for providing control of such sequencing operation (a "microsequencing" process) is illustrated in copending U.S. patent application Ser. No. 143,710, filed Apr. 25, 1980 by C. J. Holland et al., in which a decoded macroinstruction provides the starting address of a sequence of one or more microinstructions representing a microroutine. The starting address is supplied to a unique microinstruction sequencing unit, in the system described therein, which unit appropriately decodes a selected field of each microinstruction for determining the address of the next successive microinstruction, the address being suitably selected from a plurality of microaddress sources. An exemplary overall configuration in which such a microsequencer is utilized is described in the above-referenced application and such application is, accordingly, incorporated by reference herein.
As described in the aforesaid application, the entire microinstruction set for the system is loaded into a microcontrol store means, e.g., a random access memory (RAM), and the starting address of a particularly sequence thereof is supplied from a suitable instruction processor unit which decodes a macroinstruction for such purpose. The microsequencer unit then must determine the next address required for each sequential microinstruction (if any) via appropriate decoding of a "next address control" field of the current microinstruction. An address multiplexer unit is utilized to select the source of the address for the next sequential microinstruction, such microaddress being obtained from one of a number of different sources, e.g., from an incremented micro-program counter unit, from a temporary storage of microaddresses for a particular microcode routine which are stored in a stack RAM unit, from an address which has been accessed from the stack and saved in a previous operation, from an address which is supplied from a source external to the microsequencer unit itself, from an absolute address supplied externally via a dispatch multiplexer, as discussed in the aforesaid Holland et al. application.
In performing microroutines it is often necessary to use sub-routines which are common to many main microroutines and to have such sub-routines readily available so that the microprogram can jump thereto and return to the next step in the main routine with no problem. In most conventional sequencing operations, only certain sub-routines may be set up as common sub-routines, so that the main microroutines must always include appropriate instructions for jumping to the subroutine and for subsequently returning to the main microroutine when the latter indicates the subroutine operation has been completed. In general the sub-routine merely indicates, in effect, that it is "DONE" and the microprogrammer then must arrange the sub-routine to permit a return to the appropriate sequence of microinstructions in the main microroutine.
In contrast to such conventional microinstruction sequencing control operation, it is desirable that all microcode routines be utilizable, in effect, as microcode sub-routines when appropriate and that all such microroutines be capable of either returning a new macroinstruction (and, hence, a new microroutine) automatically without the need for special instructions therefor.